AI & ML
An Optimal Power-Flow Grouping Topology for Single-Isolation-Stage Multi-Output Solid-State Transformers
arXiv cs.SY0 views
arXiv:2611.09305v1 Announce Type: new Abstract: Electric-vehicle dc fast-charging stations and data centers require multiple high-power dc outputs with independently varying demands. Conventional multi-output solid-state transformers typically establish a common dc bus and use downstream dc/dc converters for port-level regulation and, where required, galvanic isolation. A single-isolation-stage solid-state transformer can eliminate this additional high-power interface stage by directly forming multiple isolated outputs from its submodule dc/dc stages. However, because one submodule is generally insufficient for an individual output port, multiple submodules must be connected in parallel, while inter-submodule balancing circuits redistribute power under unbalanced loading. The submodule grouping therefore determines the internal balancing-power paths. Sequential grouping can create long transfer paths and accumulated balancing power, increasing current stress and losses. This paper proposes an optimal power-flow grouping topology that interleaves submodules assigned to different output ports, thereby localizing power redistribution and reducing the power processed by the balancing circuits. Analytical models quantify the required balancing power and its reduction relative to sequential grouping. A coordinated submodule-bypass strategy is also developed, and the remaining output-power capability under different fault scenarios is evaluated. A six-submodule prototype validates the proposed topology. Under the same highly unbalanced operating conditions, the proposed topology reduces the maximum submodule dc-link voltage difference by 63\% and the peak balancing current by 14.5%, while improving the measured efficiency by approximately 5.6% at rated power. Stable post-fault operation is also experimentally demonstrated.
Source:https://arxiv.org/abs/2611.09305PreviousDC-Link Voltage Regulation in a Single-Isolation-Stage Multioutput Solid-State Transformer for Wide-Range DC OutputsNextAn Inspection Game for Monitor Design Against GNSS Timing Attacks in Synchronous Islanding
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